1// Copyright (C) 2022 Intel Corporation.
2// SPDX-License-Identifier: LicenseRef-Qt-Commercial OR LGPL-3.0-only OR GPL-2.0-only OR GPL-3.0-only
3// This is a generated file. DO NOT EDIT.
4// Please see util/x86simdgen/README.md
5
6//
7// W A R N I N G
8// -------------
9//
10// This file is not part of the Qt API. It exists purely as an
11// implementation detail. This header file may change from version to
12// version without notice, or even be removed.
13//
14// We mean it.
15//
16
17// This is a generated file. DO NOT EDIT.
18// Please see util/x86simdgen/README.md
19#ifndef QSIMD_X86_P_H
20#define QSIMD_X86_P_H
21
22#include <stdint.h>
23
24// in CPUID Leaf 1, EDX:
25#define cpu_feature_sse2 (UINT64_C(1) << 0)
26
27// in CPUID Leaf 1, ECX:
28#define cpu_feature_sse3 (UINT64_C(1) << 1)
29#define cpu_feature_ssse3 (UINT64_C(1) << 2)
30#define cpu_feature_fma (UINT64_C(1) << 3)
31#define cpu_feature_sse4_1 (UINT64_C(1) << 4)
32#define cpu_feature_sse4_2 (UINT64_C(1) << 5)
33#define cpu_feature_movbe (UINT64_C(1) << 6)
34#define cpu_feature_popcnt (UINT64_C(1) << 7)
35#define cpu_feature_aes (UINT64_C(1) << 8)
36#define cpu_feature_avx (UINT64_C(1) << 9)
37#define cpu_feature_f16c (UINT64_C(1) << 10)
38#define cpu_feature_rdrnd (UINT64_C(1) << 11)
39
40// in CPUID Leaf 7, Sub-leaf 0, EBX:
41#define cpu_feature_bmi (UINT64_C(1) << 12)
42#define cpu_feature_avx2 (UINT64_C(1) << 13)
43#define cpu_feature_bmi2 (UINT64_C(1) << 14)
44#define cpu_feature_avx512f (UINT64_C(1) << 15)
45#define cpu_feature_avx512dq (UINT64_C(1) << 16)
46#define cpu_feature_rdseed (UINT64_C(1) << 17)
47#define cpu_feature_avx512ifma (UINT64_C(1) << 18)
48#define cpu_feature_avx512cd (UINT64_C(1) << 19)
49#define cpu_feature_sha (UINT64_C(1) << 20)
50#define cpu_feature_avx512bw (UINT64_C(1) << 21)
51#define cpu_feature_avx512vl (UINT64_C(1) << 22)
52
53// in CPUID Leaf 7, Sub-leaf 0, ECX:
54#define cpu_feature_avx512vbmi (UINT64_C(1) << 23)
55#define cpu_feature_waitpkg (UINT64_C(1) << 24)
56#define cpu_feature_avx512vbmi2 (UINT64_C(1) << 25)
57#define cpu_feature_shstk (UINT64_C(1) << 26)
58#define cpu_feature_gfni (UINT64_C(1) << 27)
59#define cpu_feature_vaes (UINT64_C(1) << 28)
60#define cpu_feature_avx512bitalg (UINT64_C(1) << 29)
61#define cpu_feature_avx512vpopcntdq (UINT64_C(1) << 30)
62
63// in CPUID Leaf 7, Sub-leaf 0, EDX:
64#define cpu_feature_hybrid (UINT64_C(1) << 31)
65#define cpu_feature_ibt (UINT64_C(1) << 32)
66#define cpu_feature_avx512fp16 (UINT64_C(1) << 33)
67
68// in CPUID Leaf 7, Sub-leaf 1, EAX:
69#define cpu_feature_raoint (UINT64_C(1) << 34)
70#define cpu_feature_cmpccxadd (UINT64_C(1) << 35)
71#define cpu_feature_avxifma (UINT64_C(1) << 36)
72#define cpu_feature_lam (UINT64_C(1) << 37)
73
74// CPU architectures
75#define cpu_x86_64 (0 \
76 | cpu_feature_sse2)
77#define cpu_core2 (cpu_x86_64 \
78 | cpu_feature_sse3 \
79 | cpu_feature_ssse3)
80#define cpu_nhm (cpu_core2 \
81 | cpu_feature_sse4_1 \
82 | cpu_feature_sse4_2 \
83 | cpu_feature_popcnt)
84#define cpu_wsm (cpu_nhm)
85#define cpu_snb (cpu_wsm \
86 | cpu_feature_avx)
87#define cpu_ivb (cpu_snb \
88 | cpu_feature_f16c)
89#define cpu_hsw (cpu_ivb \
90 | cpu_feature_avx2 \
91 | cpu_feature_fma \
92 | cpu_feature_bmi \
93 | cpu_feature_bmi2 \
94 | cpu_feature_movbe)
95#define cpu_bdw (cpu_hsw)
96#define cpu_bdx (cpu_bdw)
97#define cpu_skl (cpu_bdw)
98#define cpu_skx (cpu_skl \
99 | cpu_feature_avx512f \
100 | cpu_feature_avx512dq \
101 | cpu_feature_avx512cd \
102 | cpu_feature_avx512bw \
103 | cpu_feature_avx512vl)
104#define cpu_clx (cpu_skx)
105#define cpu_cpx (cpu_clx)
106#define cpu_plc (cpu_skx \
107 | cpu_feature_avx512ifma \
108 | cpu_feature_avx512vbmi)
109#define cpu_snc (cpu_plc \
110 | cpu_feature_avx512vbmi2 \
111 | cpu_feature_gfni \
112 | cpu_feature_vaes \
113 | cpu_feature_avx512bitalg \
114 | cpu_feature_avx512vpopcntdq)
115#define cpu_wlc (cpu_snc \
116 | cpu_feature_shstk \
117 | cpu_feature_ibt)
118#define cpu_glc (cpu_wlc \
119 | cpu_feature_waitpkg)
120#define cpu_rpc (cpu_glc)
121#define cpu_rwc (cpu_rpc)
122#define cpu_slm (cpu_wsm \
123 | cpu_feature_rdrnd \
124 | cpu_feature_movbe)
125#define cpu_glm (cpu_slm \
126 | cpu_feature_rdseed)
127#define cpu_tnt (cpu_glm \
128 | cpu_feature_gfni \
129 | cpu_feature_waitpkg)
130#define cpu_grt (cpu_skl \
131 | cpu_feature_gfni \
132 | cpu_feature_vaes \
133 | cpu_feature_shstk \
134 | cpu_feature_ibt \
135 | cpu_feature_waitpkg)
136#define cpu_cmt (cpu_grt \
137 | cpu_feature_cmpccxadd \
138 | cpu_feature_avxifma)
139#define cpu_cnl (cpu_plc)
140#define cpu_icl (cpu_snc)
141#define cpu_tgl (cpu_wlc)
142#define cpu_adl (cpu_grt)
143#define cpu_rpl (cpu_grt)
144#define cpu_mtl (cpu_cmt)
145#define cpu_arl (cpu_cmt)
146#define cpu_lnl (cpu_cmt)
147#define cpu_icx (cpu_snc)
148#define cpu_spr (cpu_glc)
149#define cpu_emr (cpu_spr)
150#define cpu_gnr (cpu_glc)
151#define cpu_srf (cpu_cmt \
152 | cpu_feature_cmpccxadd \
153 | cpu_feature_avxifma)
154#define cpu_grr (cpu_srf \
155 | cpu_feature_raoint)
156#define cpu_cwf (cpu_srf)
157#define cpu_nehalem (cpu_nhm)
158#define cpu_westmere (cpu_wsm)
159#define cpu_sandybridge (cpu_snb)
160#define cpu_ivybridge (cpu_ivb)
161#define cpu_haswell (cpu_hsw)
162#define cpu_broadwell (cpu_bdw)
163#define cpu_skylake (cpu_skl)
164#define cpu_skylake_avx512 (cpu_skx)
165#define cpu_cascadelake (cpu_clx)
166#define cpu_cooperlake (cpu_cpx)
167#define cpu_palmcove (cpu_plc)
168#define cpu_cannonlake (cpu_cnl)
169#define cpu_sunnycove (cpu_snc)
170#define cpu_icelake_client (cpu_icl)
171#define cpu_icelake_server (cpu_icx)
172#define cpu_willowcove (cpu_wlc)
173#define cpu_tigerlake (cpu_tgl)
174#define cpu_goldencove (cpu_glc)
175#define cpu_alderlake (cpu_adl)
176#define cpu_raptorcove (cpu_rpc)
177#define cpu_raptorlake (cpu_rpl)
178#define cpu_redwoodcove (cpu_rwc)
179#define cpu_meteorlake (cpu_mtl)
180#define cpu_arrowlake (cpu_arl)
181#define cpu_lunarlake (cpu_lnl)
182#define cpu_sapphirerapids (cpu_spr)
183#define cpu_emeraldrapids (cpu_emr)
184#define cpu_graniterapids (cpu_gnr)
185#define cpu_silvermont (cpu_slm)
186#define cpu_goldmont (cpu_glm)
187#define cpu_tremont (cpu_tnt)
188#define cpu_gracemont (cpu_grt)
189#define cpu_crestmont (cpu_cmt)
190#define cpu_grandridge (cpu_grr)
191#define cpu_sierraforest (cpu_srf)
192#define cpu_clearwaterforest (cpu_cwf)
193
194// __attribute__ target strings for GCC and Clang
195#define QT_FUNCTION_TARGET_STRING_SSE2 "sse2"
196#define QT_FUNCTION_TARGET_STRING_SSE3 "sse3"
197#define QT_FUNCTION_TARGET_STRING_SSSE3 "ssse3"
198#define QT_FUNCTION_TARGET_STRING_FMA "fma"
199#define QT_FUNCTION_TARGET_STRING_SSE4_1 "sse4.1"
200#define QT_FUNCTION_TARGET_STRING_SSE4_2 "sse4.2"
201#define QT_FUNCTION_TARGET_STRING_MOVBE "movbe"
202#define QT_FUNCTION_TARGET_STRING_POPCNT "popcnt"
203#define QT_FUNCTION_TARGET_STRING_AES "aes,sse4.2"
204#define QT_FUNCTION_TARGET_STRING_AVX "avx"
205#define QT_FUNCTION_TARGET_STRING_F16C "f16c,avx"
206#define QT_FUNCTION_TARGET_STRING_RDRND "rdrnd"
207#define QT_FUNCTION_TARGET_STRING_BMI "bmi"
208#define QT_FUNCTION_TARGET_STRING_AVX2 "avx2,avx"
209#define QT_FUNCTION_TARGET_STRING_BMI2 "bmi2"
210#define QT_FUNCTION_TARGET_STRING_AVX512F "avx512f,avx"
211#define QT_FUNCTION_TARGET_STRING_AVX512DQ "avx512dq,avx512f"
212#define QT_FUNCTION_TARGET_STRING_RDSEED "rdseed"
213#define QT_FUNCTION_TARGET_STRING_AVX512IFMA "avx512ifma,avx512f"
214#define QT_FUNCTION_TARGET_STRING_AVX512CD "avx512cd,avx512f"
215#define QT_FUNCTION_TARGET_STRING_SHA "sha"
216#define QT_FUNCTION_TARGET_STRING_AVX512BW "avx512bw,avx512f"
217#define QT_FUNCTION_TARGET_STRING_AVX512VL "avx512vl,avx512f"
218#define QT_FUNCTION_TARGET_STRING_AVX512VBMI "avx512vbmi,avx512f"
219#define QT_FUNCTION_TARGET_STRING_WAITPKG "waitpkg"
220#define QT_FUNCTION_TARGET_STRING_AVX512VBMI2 "avx512vbmi2,avx512f"
221#define QT_FUNCTION_TARGET_STRING_SHSTK "shstk"
222#define QT_FUNCTION_TARGET_STRING_GFNI "gfni"
223#define QT_FUNCTION_TARGET_STRING_VAES "vaes,avx2,avx,aes"
224#define QT_FUNCTION_TARGET_STRING_AVX512BITALG "avx512bitalg,avx512f"
225#define QT_FUNCTION_TARGET_STRING_AVX512VPOPCNTDQ "avx512vpopcntdq,avx512f"
226#define QT_FUNCTION_TARGET_STRING_HYBRID "hybrid"
227#define QT_FUNCTION_TARGET_STRING_IBT "ibt"
228#define QT_FUNCTION_TARGET_STRING_AVX512FP16 "avx512fp16,avx512f,f16c"
229#define QT_FUNCTION_TARGET_STRING_RAOINT "raoint"
230#define QT_FUNCTION_TARGET_STRING_CMPCCXADD "cmpccxadd"
231#define QT_FUNCTION_TARGET_STRING_AVXIFMA "avxifma,avx"
232#define QT_FUNCTION_TARGET_STRING_LAM "lam"
233#define QT_FUNCTION_TARGET_STRING_ARCH_X86_64 "sse2"
234#define QT_FUNCTION_TARGET_STRING_ARCH_CORE2 QT_FUNCTION_TARGET_STRING_ARCH_X86_64 ",sse3,ssse3,cx16"
235#define QT_FUNCTION_TARGET_STRING_ARCH_NHM QT_FUNCTION_TARGET_STRING_ARCH_CORE2 ",sse4.1,sse4.2,popcnt"
236#define QT_FUNCTION_TARGET_STRING_ARCH_WSM QT_FUNCTION_TARGET_STRING_ARCH_NHM
237#define QT_FUNCTION_TARGET_STRING_ARCH_SNB QT_FUNCTION_TARGET_STRING_ARCH_WSM ",avx"
238#define QT_FUNCTION_TARGET_STRING_ARCH_IVB QT_FUNCTION_TARGET_STRING_ARCH_SNB ",f16c,fsgsbase"
239#define QT_FUNCTION_TARGET_STRING_ARCH_HSW QT_FUNCTION_TARGET_STRING_ARCH_IVB ",avx2,fma,bmi,bmi2,lzcnt,movbe"
240#define QT_FUNCTION_TARGET_STRING_ARCH_BDW QT_FUNCTION_TARGET_STRING_ARCH_HSW ",adx"
241#define QT_FUNCTION_TARGET_STRING_ARCH_BDX QT_FUNCTION_TARGET_STRING_ARCH_BDW
242#define QT_FUNCTION_TARGET_STRING_ARCH_SKL QT_FUNCTION_TARGET_STRING_ARCH_BDW ",xsavec,xsaves"
243#define QT_FUNCTION_TARGET_STRING_ARCH_SKX QT_FUNCTION_TARGET_STRING_ARCH_SKL ",avx512f,avx512dq,avx512cd,avx512bw,avx512vl"
244#define QT_FUNCTION_TARGET_STRING_ARCH_CLX QT_FUNCTION_TARGET_STRING_ARCH_SKX ",avx512vnni"
245#define QT_FUNCTION_TARGET_STRING_ARCH_CPX QT_FUNCTION_TARGET_STRING_ARCH_CLX ",avx512bf16"
246#define QT_FUNCTION_TARGET_STRING_ARCH_PLC QT_FUNCTION_TARGET_STRING_ARCH_SKX ",avx512ifma,avx512vbmi"
247#define QT_FUNCTION_TARGET_STRING_ARCH_SNC QT_FUNCTION_TARGET_STRING_ARCH_PLC ",avx512vbmi2,gfni,vaes,vpclmulqdq,avx512vnni,avx512bitalg,avx512vpopcntdq"
248#define QT_FUNCTION_TARGET_STRING_ARCH_WLC QT_FUNCTION_TARGET_STRING_ARCH_SNC ",shstk,movdiri,movdir64b,ibt,keylocker"
249#define QT_FUNCTION_TARGET_STRING_ARCH_GLC QT_FUNCTION_TARGET_STRING_ARCH_WLC ",avx512bf16,avxvnni,cldemote,waitpkg,serialize,uintr"
250#define QT_FUNCTION_TARGET_STRING_ARCH_RPC QT_FUNCTION_TARGET_STRING_ARCH_GLC
251#define QT_FUNCTION_TARGET_STRING_ARCH_RWC QT_FUNCTION_TARGET_STRING_ARCH_RPC ",prefetchiti"
252#define QT_FUNCTION_TARGET_STRING_ARCH_SLM QT_FUNCTION_TARGET_STRING_ARCH_WSM ",rdrnd,movbe"
253#define QT_FUNCTION_TARGET_STRING_ARCH_GLM QT_FUNCTION_TARGET_STRING_ARCH_SLM ",fsgsbase,rdseed,lzcnt,xsavec,xsaves"
254#define QT_FUNCTION_TARGET_STRING_ARCH_TNT QT_FUNCTION_TARGET_STRING_ARCH_GLM ",clwb,gfni,cldemote,waitpkg,movdiri,movdir64b"
255#define QT_FUNCTION_TARGET_STRING_ARCH_GRT QT_FUNCTION_TARGET_STRING_ARCH_SKL ",avxvnni,gfni,vaes,vpclmulqdq,serialize,shstk,cldemote,movdiri,movdir64b,ibt,waitpkg,keylocker"
256#define QT_FUNCTION_TARGET_STRING_ARCH_CMT QT_FUNCTION_TARGET_STRING_ARCH_GRT ",cmpccxadd,avxifma,avxneconvert,avxvnniint8"
257#define QT_FUNCTION_TARGET_STRING_ARCH_CNL QT_FUNCTION_TARGET_STRING_ARCH_PLC
258#define QT_FUNCTION_TARGET_STRING_ARCH_ICL QT_FUNCTION_TARGET_STRING_ARCH_SNC
259#define QT_FUNCTION_TARGET_STRING_ARCH_TGL QT_FUNCTION_TARGET_STRING_ARCH_WLC
260#define QT_FUNCTION_TARGET_STRING_ARCH_ADL QT_FUNCTION_TARGET_STRING_ARCH_GRT
261#define QT_FUNCTION_TARGET_STRING_ARCH_RPL QT_FUNCTION_TARGET_STRING_ARCH_GRT
262#define QT_FUNCTION_TARGET_STRING_ARCH_MTL QT_FUNCTION_TARGET_STRING_ARCH_CMT
263#define QT_FUNCTION_TARGET_STRING_ARCH_ARL QT_FUNCTION_TARGET_STRING_ARCH_CMT
264#define QT_FUNCTION_TARGET_STRING_ARCH_LNL QT_FUNCTION_TARGET_STRING_ARCH_CMT
265#define QT_FUNCTION_TARGET_STRING_ARCH_ICX QT_FUNCTION_TARGET_STRING_ARCH_SNC ",pconfig"
266#define QT_FUNCTION_TARGET_STRING_ARCH_SPR QT_FUNCTION_TARGET_STRING_ARCH_GLC ",pconfig,amx-tile,amx-bf16,amx-int8"
267#define QT_FUNCTION_TARGET_STRING_ARCH_EMR QT_FUNCTION_TARGET_STRING_ARCH_SPR
268#define QT_FUNCTION_TARGET_STRING_ARCH_GNR QT_FUNCTION_TARGET_STRING_ARCH_GLC ",pconfig,amx-tile,amx-bf16,amx-int8,amx-fp16,amx-complex"
269#define QT_FUNCTION_TARGET_STRING_ARCH_SRF QT_FUNCTION_TARGET_STRING_ARCH_CMT ",cmpccxadd,avxifma,avxneconvert,avxvnniint8"
270#define QT_FUNCTION_TARGET_STRING_ARCH_GRR QT_FUNCTION_TARGET_STRING_ARCH_SRF ",raoint"
271#define QT_FUNCTION_TARGET_STRING_ARCH_CWF QT_FUNCTION_TARGET_STRING_ARCH_SRF
272#define QT_FUNCTION_TARGET_STRING_ARCH_NEHALEM QT_FUNCTION_TARGET_STRING_ARCH_NHM
273#define QT_FUNCTION_TARGET_STRING_ARCH_WESTMERE QT_FUNCTION_TARGET_STRING_ARCH_WSM
274#define QT_FUNCTION_TARGET_STRING_ARCH_SANDYBRIDGE QT_FUNCTION_TARGET_STRING_ARCH_SNB
275#define QT_FUNCTION_TARGET_STRING_ARCH_IVYBRIDGE QT_FUNCTION_TARGET_STRING_ARCH_IVB
276#define QT_FUNCTION_TARGET_STRING_ARCH_HASWELL QT_FUNCTION_TARGET_STRING_ARCH_HSW
277#define QT_FUNCTION_TARGET_STRING_ARCH_BROADWELL QT_FUNCTION_TARGET_STRING_ARCH_BDW
278#define QT_FUNCTION_TARGET_STRING_ARCH_SKYLAKE QT_FUNCTION_TARGET_STRING_ARCH_SKL
279#define QT_FUNCTION_TARGET_STRING_ARCH_SKYLAKE_AVX512 QT_FUNCTION_TARGET_STRING_ARCH_SKX
280#define QT_FUNCTION_TARGET_STRING_ARCH_CASCADELAKE QT_FUNCTION_TARGET_STRING_ARCH_CLX
281#define QT_FUNCTION_TARGET_STRING_ARCH_COOPERLAKE QT_FUNCTION_TARGET_STRING_ARCH_CPX
282#define QT_FUNCTION_TARGET_STRING_ARCH_PALMCOVE QT_FUNCTION_TARGET_STRING_ARCH_PLC
283#define QT_FUNCTION_TARGET_STRING_ARCH_CANNONLAKE QT_FUNCTION_TARGET_STRING_ARCH_CNL
284#define QT_FUNCTION_TARGET_STRING_ARCH_SUNNYCOVE QT_FUNCTION_TARGET_STRING_ARCH_SNC
285#define QT_FUNCTION_TARGET_STRING_ARCH_ICELAKE_CLIENT QT_FUNCTION_TARGET_STRING_ARCH_ICL
286#define QT_FUNCTION_TARGET_STRING_ARCH_ICELAKE_SERVER QT_FUNCTION_TARGET_STRING_ARCH_ICX
287#define QT_FUNCTION_TARGET_STRING_ARCH_WILLOWCOVE QT_FUNCTION_TARGET_STRING_ARCH_WLC
288#define QT_FUNCTION_TARGET_STRING_ARCH_TIGERLAKE QT_FUNCTION_TARGET_STRING_ARCH_TGL
289#define QT_FUNCTION_TARGET_STRING_ARCH_GOLDENCOVE QT_FUNCTION_TARGET_STRING_ARCH_GLC
290#define QT_FUNCTION_TARGET_STRING_ARCH_ALDERLAKE QT_FUNCTION_TARGET_STRING_ARCH_ADL
291#define QT_FUNCTION_TARGET_STRING_ARCH_RAPTORCOVE QT_FUNCTION_TARGET_STRING_ARCH_RPC
292#define QT_FUNCTION_TARGET_STRING_ARCH_RAPTORLAKE QT_FUNCTION_TARGET_STRING_ARCH_RPL
293#define QT_FUNCTION_TARGET_STRING_ARCH_REDWOODCOVE QT_FUNCTION_TARGET_STRING_ARCH_RWC
294#define QT_FUNCTION_TARGET_STRING_ARCH_METEORLAKE QT_FUNCTION_TARGET_STRING_ARCH_MTL
295#define QT_FUNCTION_TARGET_STRING_ARCH_ARROWLAKE QT_FUNCTION_TARGET_STRING_ARCH_ARL
296#define QT_FUNCTION_TARGET_STRING_ARCH_LUNARLAKE QT_FUNCTION_TARGET_STRING_ARCH_LNL
297#define QT_FUNCTION_TARGET_STRING_ARCH_SAPPHIRERAPIDS QT_FUNCTION_TARGET_STRING_ARCH_SPR
298#define QT_FUNCTION_TARGET_STRING_ARCH_EMERALDRAPIDS QT_FUNCTION_TARGET_STRING_ARCH_EMR
299#define QT_FUNCTION_TARGET_STRING_ARCH_GRANITERAPIDS QT_FUNCTION_TARGET_STRING_ARCH_GNR
300#define QT_FUNCTION_TARGET_STRING_ARCH_SILVERMONT QT_FUNCTION_TARGET_STRING_ARCH_SLM
301#define QT_FUNCTION_TARGET_STRING_ARCH_GOLDMONT QT_FUNCTION_TARGET_STRING_ARCH_GLM
302#define QT_FUNCTION_TARGET_STRING_ARCH_TREMONT QT_FUNCTION_TARGET_STRING_ARCH_TNT
303#define QT_FUNCTION_TARGET_STRING_ARCH_GRACEMONT QT_FUNCTION_TARGET_STRING_ARCH_GRT
304#define QT_FUNCTION_TARGET_STRING_ARCH_CRESTMONT QT_FUNCTION_TARGET_STRING_ARCH_CMT
305#define QT_FUNCTION_TARGET_STRING_ARCH_GRANDRIDGE QT_FUNCTION_TARGET_STRING_ARCH_GRR
306#define QT_FUNCTION_TARGET_STRING_ARCH_SIERRAFOREST QT_FUNCTION_TARGET_STRING_ARCH_SRF
307#define QT_FUNCTION_TARGET_STRING_ARCH_CLEARWATERFOREST QT_FUNCTION_TARGET_STRING_ARCH_CWF
308
309static const uint64_t _compilerCpuFeatures = 0
310#ifdef __SSE2__
311 | cpu_feature_sse2
312#endif
313#ifdef __SSE3__
314 | cpu_feature_sse3
315#endif
316#ifdef __SSSE3__
317 | cpu_feature_ssse3
318#endif
319#ifdef __FMA__
320 | cpu_feature_fma
321#endif
322#ifdef __SSE4_1__
323 | cpu_feature_sse4_1
324#endif
325#ifdef __SSE4_2__
326 | cpu_feature_sse4_2
327#endif
328#ifdef __MOVBE__
329 | cpu_feature_movbe
330#endif
331#ifdef __POPCNT__
332 | cpu_feature_popcnt
333#endif
334#ifdef __AES__
335 | cpu_feature_aes
336#endif
337#ifdef __AVX__
338 | cpu_feature_avx
339#endif
340#ifdef __F16C__
341 | cpu_feature_f16c
342#endif
343#ifdef __RDRND__
344 | cpu_feature_rdrnd
345#endif
346#ifdef __BMI__
347 | cpu_feature_bmi
348#endif
349#ifdef __AVX2__
350 | cpu_feature_avx2
351#endif
352#ifdef __BMI2__
353 | cpu_feature_bmi2
354#endif
355#ifdef __AVX512F__
356 | cpu_feature_avx512f
357#endif
358#ifdef __AVX512DQ__
359 | cpu_feature_avx512dq
360#endif
361#ifdef __RDSEED__
362 | cpu_feature_rdseed
363#endif
364#ifdef __AVX512IFMA__
365 | cpu_feature_avx512ifma
366#endif
367#ifdef __AVX512CD__
368 | cpu_feature_avx512cd
369#endif
370#ifdef __SHA__
371 | cpu_feature_sha
372#endif
373#ifdef __AVX512BW__
374 | cpu_feature_avx512bw
375#endif
376#ifdef __AVX512VL__
377 | cpu_feature_avx512vl
378#endif
379#ifdef __AVX512VBMI__
380 | cpu_feature_avx512vbmi
381#endif
382#ifdef __WAITPKG__
383 | cpu_feature_waitpkg
384#endif
385#ifdef __AVX512VBMI2__
386 | cpu_feature_avx512vbmi2
387#endif
388#ifdef __SHSTK__
389 | cpu_feature_shstk
390#endif
391#ifdef __GFNI__
392 | cpu_feature_gfni
393#endif
394#ifdef __VAES__
395 | cpu_feature_vaes
396#endif
397#ifdef __AVX512BITALG__
398 | cpu_feature_avx512bitalg
399#endif
400#ifdef __AVX512VPOPCNTDQ__
401 | cpu_feature_avx512vpopcntdq
402#endif
403#ifdef __HYBRID__
404 | cpu_feature_hybrid
405#endif
406#ifdef __IBT__
407 | cpu_feature_ibt
408#endif
409#ifdef __AVX512FP16__
410 | cpu_feature_avx512fp16
411#endif
412#ifdef __RAOINT__
413 | cpu_feature_raoint
414#endif
415#ifdef __CMPCCXADD__
416 | cpu_feature_cmpccxadd
417#endif
418#ifdef __AVXIFMA__
419 | cpu_feature_avxifma
420#endif
421#ifdef __LAM__
422 | cpu_feature_lam
423#endif
424 ;
425
426#if (defined __cplusplus) && __cplusplus >= 201103L
427enum X86CpuFeatures : uint64_t {
428 CpuFeatureSSE2 = cpu_feature_sse2, ///< Streaming SIMD Extensions 2
429 CpuFeatureSSE3 = cpu_feature_sse3, ///< Streaming SIMD Extensions 3
430 CpuFeatureSSSE3 = cpu_feature_ssse3, ///< Supplemental Streaming SIMD Extensions 3
431 CpuFeatureFMA = cpu_feature_fma, ///< Fused Multiply-Add
432 CpuFeatureSSE4_1 = cpu_feature_sse4_1, ///< Streaming SIMD Extensions 4.1
433 CpuFeatureSSE4_2 = cpu_feature_sse4_2, ///< Streaming SIMD Extensions 4.2
434 CpuFeatureMOVBE = cpu_feature_movbe, ///< MOV Big Endian
435 CpuFeaturePOPCNT = cpu_feature_popcnt, ///< Population count
436 CpuFeatureAES = cpu_feature_aes, ///< Advenced Encryption Standard
437 CpuFeatureAVX = cpu_feature_avx, ///< Advanced Vector Extensions
438 CpuFeatureF16C = cpu_feature_f16c, ///< 16-bit Float Conversion
439 CpuFeatureRDRND = cpu_feature_rdrnd, ///< Random number generator
440 CpuFeatureBMI = cpu_feature_bmi, ///< Bit Manipulation Instructions
441 CpuFeatureAVX2 = cpu_feature_avx2, ///< Advanced Vector Extensions 2
442 CpuFeatureBMI2 = cpu_feature_bmi2, ///< Bit Manipulation Instructions 2
443 CpuFeatureAVX512F = cpu_feature_avx512f, ///< AVX512 Foundation
444 CpuFeatureAVX512DQ = cpu_feature_avx512dq, ///< AVX512 Double & Quadword
445 CpuFeatureRDSEED = cpu_feature_rdseed, ///< Random number generator for seeding
446 CpuFeatureAVX512IFMA = cpu_feature_avx512ifma, ///< AVX512 Integer Fused Multiply-Add
447 CpuFeatureAVX512CD = cpu_feature_avx512cd, ///< AVX512 Conflict Detection
448 CpuFeatureSHA = cpu_feature_sha, ///< SHA-1 and SHA-256 instructions
449 CpuFeatureAVX512BW = cpu_feature_avx512bw, ///< AVX512 Byte & Word
450 CpuFeatureAVX512VL = cpu_feature_avx512vl, ///< AVX512 Vector Length
451 CpuFeatureAVX512VBMI = cpu_feature_avx512vbmi, ///< AVX512 Vector Byte Manipulation Instructions
452 CpuFeatureWAITPKG = cpu_feature_waitpkg, ///< User-Level Monitor / Wait
453 CpuFeatureAVX512VBMI2 = cpu_feature_avx512vbmi2, ///< AVX512 Vector Byte Manipulation Instructions 2
454 CpuFeatureSHSTK = cpu_feature_shstk, ///< Control Flow Enforcement Technology Shadow Stack
455 CpuFeatureGFNI = cpu_feature_gfni, ///< Galois Field new instructions
456 CpuFeatureVAES = cpu_feature_vaes, ///< 256- and 512-bit AES
457 CpuFeatureAVX512BITALG = cpu_feature_avx512bitalg, ///< AVX512 Bit Algorithms
458 CpuFeatureAVX512VPOPCNTDQ = cpu_feature_avx512vpopcntdq, ///< AVX512 Population Count
459 CpuFeatureHYBRID = cpu_feature_hybrid, ///< Hybrid processor
460 CpuFeatureIBT = cpu_feature_ibt, ///< Control Flow Enforcement Technology Indirect Branch Tracking
461 CpuFeatureAVX512FP16 = cpu_feature_avx512fp16, ///< AVX512 16-bit Floating Point
462 CpuFeatureRAOINT = cpu_feature_raoint, ///< Remote Atomic Operations, Integer
463 CpuFeatureCMPCCXADD = cpu_feature_cmpccxadd, ///< CMPccXADD instructions
464 CpuFeatureAVXIFMA = cpu_feature_avxifma, ///< AVX-IFMA instructions
465 CpuFeatureLAM = cpu_feature_lam, ///< Linear Address Masking
466}; // enum X86CpuFeatures
467
468enum X86CpuArchitectures : uint64_t {
469 CpuArchx8664 = cpu_x86_64,
470 CpuArchCore2 = cpu_core2,
471 CpuArchNHM = cpu_nhm,
472 CpuArchWSM = cpu_wsm,
473 CpuArchSNB = cpu_snb,
474 CpuArchIVB = cpu_ivb, ///< rdrnd
475 CpuArchHSW = cpu_hsw, ///< hle,rtm
476 CpuArchBDW = cpu_bdw, ///< rdseed
477 CpuArchBDX = cpu_bdx,
478 CpuArchSKL = cpu_skl,
479 CpuArchSKX = cpu_skx, ///< clwb
480 CpuArchCLX = cpu_clx,
481 CpuArchCPX = cpu_cpx,
482 CpuArchPLC = cpu_plc, ///< sha
483 CpuArchSNC = cpu_snc, ///< fsrm,rdpid
484 CpuArchWLC = cpu_wlc, ///< avx512vp2intersect
485 CpuArchGLC = cpu_glc, ///< tsxldtrk
486 CpuArchRPC = cpu_rpc,
487 CpuArchRWC = cpu_rwc,
488 CpuArchSLM = cpu_slm,
489 CpuArchGLM = cpu_glm,
490 CpuArchTNT = cpu_tnt,
491 CpuArchGRT = cpu_grt, ///< rdpid
492 CpuArchCMT = cpu_cmt,
493 CpuArchCNL = cpu_cnl,
494 CpuArchICL = cpu_icl,
495 CpuArchTGL = cpu_tgl,
496 CpuArchADL = cpu_adl,
497 CpuArchRPL = cpu_rpl,
498 CpuArchMTL = cpu_mtl,
499 CpuArchARL = cpu_arl,
500 CpuArchLNL = cpu_lnl,
501 CpuArchICX = cpu_icx,
502 CpuArchSPR = cpu_spr,
503 CpuArchEMR = cpu_emr,
504 CpuArchGNR = cpu_gnr,
505 CpuArchSRF = cpu_srf,
506 CpuArchGRR = cpu_grr,
507 CpuArchCWF = cpu_cwf,
508 CpuArchNehalem = cpu_nehalem, ///< Intel Core i3/i5/i7
509 CpuArchWestmere = cpu_westmere, ///< Intel Core i3/i5/i7
510 CpuArchSandyBridge = cpu_sandybridge, ///< Second Generation Intel Core i3/i5/i7
511 CpuArchIvyBridge = cpu_ivybridge, ///< Third Generation Intel Core i3/i5/i7
512 CpuArchHaswell = cpu_haswell, ///< Fourth Generation Intel Core i3/i5/i7
513 CpuArchBroadwell = cpu_broadwell, ///< Fifth Generation Intel Core i3/i5/i7
514 CpuArchSkylake = cpu_skylake, ///< Sixth Generation Intel Core i3/i5/i7
515 CpuArchSkylakeAvx512 = cpu_skylake_avx512, ///< Intel Xeon Scalable
516 CpuArchCascadeLake = cpu_cascadelake, ///< Second Generation Intel Xeon Scalable
517 CpuArchCooperLake = cpu_cooperlake, ///< Third Generation Intel Xeon Scalable
518 CpuArchPalmCove = cpu_palmcove,
519 CpuArchCannonLake = cpu_cannonlake, ///< Intel Core i3-8121U
520 CpuArchSunnyCove = cpu_sunnycove,
521 CpuArchIceLakeClient = cpu_icelake_client, ///< Tenth Generation Intel Core i3/i5/i7
522 CpuArchIceLakeServer = cpu_icelake_server, ///< Third Generation Intel Xeon Scalable
523 CpuArchWillowCove = cpu_willowcove,
524 CpuArchTigerLake = cpu_tigerlake, ///< Eleventh Generation Intel Core i3/i5/i7
525 CpuArchGoldenCove = cpu_goldencove,
526 CpuArchAlderLake = cpu_alderlake, ///< Twelfth Generation Intel Core
527 CpuArchRaptorCove = cpu_raptorcove,
528 CpuArchRaptorLake = cpu_raptorlake, ///< Thirteenth Generation Intel Core
529 CpuArchRedwoodCove = cpu_redwoodcove,
530 CpuArchMeteorLake = cpu_meteorlake,
531 CpuArchArrowLake = cpu_arrowlake,
532 CpuArchLunarLake = cpu_lunarlake,
533 CpuArchSapphireRapids = cpu_sapphirerapids, ///< Fourth Generation Intel Xeon Scalable
534 CpuArchEmeraldRapids = cpu_emeraldrapids, ///< Fifth Generation Intel Xeon Scalable
535 CpuArchGraniteRapids = cpu_graniterapids,
536 CpuArchSilvermont = cpu_silvermont,
537 CpuArchGoldmont = cpu_goldmont,
538 CpuArchTremont = cpu_tremont,
539 CpuArchGracemont = cpu_gracemont,
540 CpuArchCrestmont = cpu_crestmont,
541 CpuArchGrandRidge = cpu_grandridge,
542 CpuArchSierraForest = cpu_sierraforest,
543 CpuArchClearwaterForest = cpu_clearwaterforest,
544}; // enum X86cpuArchitectures
545#endif /* C++11 */
546
547#endif /* QSIMD_X86_P_H */
548

source code of qtbase/src/corelib/global/qsimd_x86_p.h